Virtual Platforms for Mixed Time-Criticality Applications: The CoMPSoC Architecture and SDF3 Design Flow

Systems-on-Chip (SoC) complexity increases as a growing number of applications are integrated and executed on contemporary systems. These applications consist of communicating tasks mapped on heterogeneous multi-processor platforms with distributed memory hierarchies that strike a good balance between performance, cost, power consumption and flexibility [1], [2]. Complexity is further increased by an increasing number of use-cases, which are different combinations of concurrently running applications. The applications have mixed time-criticality, which is a mix between firm, soft, and no real-time requirements. Firm real-time requirements must always be satisfied to prevent unacceptable output quality loss, while occasional failures to meet soft requirements can be tolerated. Lastly, non-real-time applications do not have welldefined timing requirements, but must still be responsive. Applications from different domains and that have different time criticalities use different design and verification methods. After applications are developed, the verification process begins. Verification of real-time requirements is traditionally performed using formal analysis, simulation, or a combination of the two. Firm real-time applications demand rigorous formal verification, since their requirements must always be met. In contrast, soft real-time applications are often verified by simulation for a large set of inputs, as they are often dynamic by nature and difficult to verify by formal methods in a costeffective manner. To reduce cost, platform resources, such as processors, interconnect, and memories, are shared between applications. However, resource sharing causes interference between applications, making their temporal behaviors inter-dependent. This results in three problems with respect to system design, verification, and integration. Firstly, accurate system-level simulation and several approaches to formal analysis in complex SoCs are infeasible, because of the state-space explosion resulting from the many use-cases, application inputs, and resources states. Secondly, use-case verification becomes a circular process that must be repeated if an application is added, removed, or modified [3]. Thirdly, it is difficult to support various automatic analysis and design flows. As a result, the integration and verification process is a dominant part of SoC development, both in terms of time and money [3]. The CoMPSoC platform [4] addresses these problems by executing each application in an independent virtual platform, and by using the SDF design flow [5] that automatically analyses firm real-time applications and maps them on a virtual platform. The CoMPSoC virtualization technology Fig. 1. CoMPSoC architecture and SDF design flow.